Home > CS2640: Computer Organization and Assembly Programming > Von Neumann ArchitectureVon Neumann Architecture
Design:
Components:
Registers:
Note: MAR and MDR can be referred to as the BIU (Bus Interface Unit)
System on a Chip (SOC): When the CPU and memory unit are on the same silicon.
Memory: - Address and content
Buses: Means by which data is transmitted from one part to another
Note: Registers used in the fetch-decode-execute cycle.
- Fetch
- PC
- IR
- Decode
- IR
- Execute
- Every single register gets used!
- REGS
- IR
- PC
- MDR
- MAR
- (If there is a jump command)
# 1. Fetch Cycle MAR <- PC # Move program counter into Memory Address Register MR # Signal read through address bus, then data bus sends data to MDR IR <- MDR # (We need to move instruction to IR for CU to work on it)
Suppose we have three locations in memory: A, B, and C.
Q: How can we do C = A + B?
A: Place A in the MAR, then send the read signal through the address bus.
In individual steps:
MAR <- @A
MR # memory read signal
MDR <- A
AC <- MDR
MAR <- @B
MR
MDR <- B
AC <- MDR
MAR <- C
MDR <- AC
MW
In assembly:
LD A // The first four lines of the above
ADD B
ST C // Store contents of AC in C
LD A # Put A in the AC
ADD B # Add B to the contents of the AC
ST A # Store contents of AC in A
# Fetch
MAR <- PC
MR
MDR < MMEM.MDR
IR <- MDR
# Decode
MAR <- @MI
MR
MDR <- MMEM.MDR
# Execute
ALU.lhs <- AC
ALU.rhs <- MDR
ALU.add
AC <- ALU.out
Biggest Difference: Instruction and data memory are separate (two memory units).